Without NVIDIA's GPUs, AI Doesn't Exist — Here's the Most Critical Career in the Whole AI Industry

The trillion-dollar AI boom runs on chips made by one company in a facility in Taiwan. That concentration is a national security risk, a supply chain crisis waiting to happen, and the single most important reason the U.S. government passed the CHIPS Act with $52 billion in funding for domestic semiconductor manufacturing. The engineers who design and manufacture semiconductors are the least famous and most critical workers in the entire AI ecosystem. While everyone talks about the AI researchers and the tech entrepreneurs, the people who actually make AI possible are designing transistors at the nanometer scale and building fabrication processes that push the limits of physics.

Why Semiconductors Are the Irreplaceable Foundation

When people talk about AI, they picture software: algorithms, neural networks, language models. What they don’t picture — but what makes everything else possible — is the physical hardware those algorithms run on.

A modern AI training cluster consists of thousands of GPUs — graphics processing units — connected by high-speed interconnects and cooled by sophisticated thermal systems. The dominant AI GPU is NVIDIA’s H100. Each H100 contains approximately 80 billion transistors etched onto a chip roughly the size of your palm. Those transistors switch on and off at rates measured in gigahertz, performing the floating-point matrix multiplications that neural network training and inference require.

The chip is manufactured through a process called deep ultraviolet (DUV) or extreme ultraviolet (EUV) lithography, which uses light wavelengths shorter than visible light to etch patterns at nanometer scales onto silicon wafers. The most advanced chips — including NVIDIA’s H100 and the forthcoming Blackwell generation — are manufactured at TSMC’s (Taiwan Semiconductor Manufacturing Company) facilities in Taiwan, using processes with features as small as 4 nanometers.

There is currently no other company in the world that can manufacture chips at this level of sophistication at scale. Samsung runs a close second. Intel is rebuilding its foundry capability. But the global supply of cutting-edge AI chips flows almost entirely through one island in the South China Sea.

This isn’t just a business risk. The U.S. government identified it explicitly as a national security risk. The CHIPS and Science Act, signed in 2022, provides $52 billion in incentives specifically to build domestic semiconductor manufacturing capacity. Intel is building two new fabs in Ohio. TSMC is building fabs in Arizona. Samsung is building in Texas. All of these projects desperately need engineers.

What Semiconductor Engineers Actually Do

The semiconductor engineering field encompasses several distinct disciplines, each requiring years of specialized training:

VLSI Design Engineers (Very Large Scale Integration) design the actual architecture of chips — laying out how transistors, logic gates, memory cells, and functional units are arranged and connected. At NVIDIA, teams of VLSI engineers spent years designing the H100’s compute units, memory system, and interconnects. This is highly specialized work that uses Electronic Design Automation (EDA) tools from companies like Cadence and Synopsys. VLSI engineers need deep understanding of digital logic, timing, power, and the physical constraints of silicon manufacturing.

Process Integration Engineers develop the manufacturing processes that translate chip designs into physical silicon. Modern semiconductor manufacturing involves hundreds of individual process steps — deposition of materials, photolithography, etching, ion implantation, chemical mechanical planarization — that must be sequenced and optimized to produce functional chips with high yield. Process engineers work at the intersection of chemistry, physics, and precision manufacturing.

Test and Characterization Engineers determine whether manufactured chips work correctly and understand how they perform across temperature, voltage, and operating conditions. Given that an H100 costs approximately $30,000–$40,000, every chip that fails to work correctly is a costly loss. Test engineering is the quality assurance function of semiconductor manufacturing, requiring both electrical engineering knowledge and programming skills to design and run automated test systems.

Packaging Engineers design how the silicon die is connected to a circuit board and protected from the environment. Modern chip packages have become extraordinarily sophisticated — NVIDIA’s H100 uses a multi-chip module where multiple silicon dies are connected by an interposer, enabling bandwidth between chips that wouldn’t be possible with conventional packaging. 3D chip stacking, chiplets, and advanced packaging are among the fastest-moving areas in semiconductor engineering.

EDA Tool Engineers develop the computer-aided design tools that all other chip engineers use. Without EDA tools, it would be physically impossible to design chips with billions of transistors. The companies that build these tools — Cadence, Synopsys, Siemens EDA — employ large teams of engineers who build the software that enables the entire industry.

The Research Picture

The Semiconductor Industry Association’s (SIA) annual State of the U.S. Semiconductor Industry report consistently identifies talent as the primary constraint on U.S. semiconductor competitiveness. Their 2023 report projected a shortfall of 67,000 semiconductor engineers in the U.S. by 2030 — a gap that the CHIPS Act’s education and workforce provisions are specifically designed to address.

TSMC’s Arizona fab expansion — a $40 billion project — ran into immediate challenges when it announced hiring difficulties in 2023. The specialized knowledge required to operate a semiconductor fabrication facility (colloquially, a “fab”) isn’t available in the Arizona labor market. TSMC flew hundreds of engineers from Taiwan to train U.S. workers. This is the talent gap made tangible.

MIT’s Microsystems Technology Laboratory, Stanford’s Nanofabrication Facility, and IMEC in Belgium are global research leaders in semiconductor process technology. Their graduate programs produce the researchers who develop the manufacturing processes that TSMC, Intel, and Samsung use years later. The pipeline from academic research to production process can take 5–10 years.

The economic scale of the industry is difficult to overstate. NVIDIA’s market capitalization exceeded $3 trillion in 2024, driven almost entirely by GPU demand for AI. TSMC’s revenue grew from approximately $56 billion in 2021 to $90 billion in 2023. ASML — the Dutch company that makes the EUV lithography machines that are essential for advanced chip manufacturing (and which has a global monopoly on this equipment) — sells machines for $350 million each and has a years-long backlog.

Career	Degree	Entry Salary	Mid-Career	Senior
VLSI Design Engineer	BS/MS EE or CmpE	$95K–$120K	$150K–$195K	$200K–$280K
Process Integration Engineer	BS/MS EE, Materials Science, Chemistry	$88K–$110K	$140K–$180K	$185K–$240K
Test & Characterization Engineer	BS/MS EE	$85K–$105K	$130K–$165K	$175K–$220K
Packaging Engineer	BS/MS EE or ME	$90K–$112K	$135K–$175K	$180K–$230K
EDA Tool Engineer	BS/MS CS or EE	$100K–$130K	$155K–$200K	$210K–$270K

Sources: SIA, BLS, LinkedIn Salary, Glassdoor 2024–2025

What This Means for Your Kid

The semiconductor engineering career is the rarest type in technology: a field where the barrier to entry is high (you genuinely need specialized education), the demand is extraordinary (the CHIPS Act exists because there aren’t enough people), and the supply is constrained by physics — you can’t learn to design chips from YouTube videos and a bootcamp.

This is a career path that rewards serious study. The kids who will become semiconductor engineers are, right now, probably not thinking about semiconductor engineering. They might be interested in electronics — how circuits work, what’s inside a computer chip. They might be fascinated by chemistry or materials science. They might love the idea of engineering at the smallest possible scale.

The foundational preparation is formal and demanding:

• Physics: Quantum mechanics is at the heart of semiconductor operation. Why does silicon conduct electricity in some conditions and not others? How do electrons tunnel through barriers thin enough? This is physics, and understanding it at a real level requires calculus-based physics coursework
• Chemistry: Semiconductor manufacturing is applied chemistry at extraordinary precision. Process engineers are chemists who understand how materials deposit, etch, and interact at nanometer scales
• Mathematics: Linear algebra, differential equations, and numerical methods are tools used daily by chip designers and process engineers
• Computer science: Modern chip design uses programming extensively — EDA tools are scripted in Python and Tcl, test systems are programmed in Python and C++, simulation tools require significant software engineering skill

For a high school student showing interest in electronics or materials, a summer research experience at a university nanofabrication facility is genuinely transformative. Many universities with clean rooms (MIT, Stanford, Cornell, Michigan) have outreach programs for high school students. The experience of actually seeing a fabrication process — even a simple one — provides context that no textbook can.

This connects directly to the future-proofing conversation: semiconductor engineering is one of the few careers where AI is a tool that makes engineers more productive, not a force threatening their employment. AI assists chip design through reinforcement learning-based floor planning and timing optimization. It doesn’t replace the engineer’s understanding of physics, chemistry, and system tradeoffs.

What to Watch Over the Next 3 Months

• Intel’s Ohio fab construction updates. Intel’s fabrication facility in New Albany, Ohio is one of the largest manufacturing investments in U.S. history. Construction updates and hiring announcements are concrete signals of the career demand
• TSMC Arizona production milestones. TSMC’s first Arizona fab reached production in late 2024 and began producing advanced chips. Further expansion phases will require thousands of additional U.S. engineers
• Samsung Texas fab announcements. Samsung’s planned Taylor, Texas expansion represents additional domestic fabrication capacity — and additional hiring
• NVIDIA’s Blackwell generation deployment. As Blackwell-class GPUs enter production, their technical specifications reveal the manufacturing process challenges that process engineers are currently solving
• CHIPS Act funding allocations. The Commerce Department’s CHIPS office has been announcing funding grants to specific semiconductor manufacturers and universities. These announcements directly tie to where engineering hiring will occur

The field is at an inflection point. U.S. domestic semiconductor manufacturing is being rebuilt from a low base with enormous urgency and funding. The engineers who enter the field over the next 10 years will be building something genuinely new — and will be paid accordingly.

FAQ

Do semiconductor engineers need a Ph.D.? It depends on the role. VLSI design and most process engineering roles are accessible with a bachelor’s or master’s degree. Research roles at advanced labs (Intel Labs, TSMC Research, academic collaborations) often require a Ph.D. The field has room for both.

Is semiconductor engineering affected by geographic restrictions? Some roles at defense-adjacent semiconductor companies involve security clearances that require U.S. citizenship. The broader industry — particularly at commercial semiconductor companies — hires internationally, though CHIPS Act-funded facilities have domestic hiring requirements attached to their government funding.

How does this field relate to the AI careers my kid hears about? Semiconductor engineering is the foundation of all AI. Without the chips, there is no AI computation. A kid who becomes a chip designer is directly enabling every other AI application — language models, image generation, autonomous vehicles, robotics. The work is less visible than building AI applications but is fundamentally enabling them.

What about quantum computing? Will it replace semiconductor engineering? Quantum computing is a research frontier that may eventually transform certain computational problems. In practical engineering terms, it is decades from replacing conventional semiconductor computing for general AI workloads. Semiconductor engineers who also understand quantum systems will be well-positioned for the eventual transition, but semiconductor engineering as a career is robust well beyond any realistic quantum computing timeline.

Can kids interested in this field find hands-on experience? Yes, through several pathways: university clean room outreach programs, Science Olympia events that include electronics, robotics programs that involve circuit design, and increasingly through high school electronics and computer engineering elective courses. Some community colleges have electronics technology programs that include clean room access.

Where does the career take you geographically? Silicon Valley (NVIDIA HQ, AMD, Intel, Cadence, Synopsys), Austin Texas (Samsung, NXP, Intel), Phoenix/Chandler Arizona (Intel, TSMC, Microchip), Portland Oregon (Intel fab), Albany New York (GlobalFoundries, IBM Research), and international (TSMC Taiwan, Samsung Korea, ASML Netherlands).

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About the author Ricky Flores is the founder of HiWave Makers and an electrical engineer with 15+ years of experience building consumer technology at Apple, Samsung, and Texas Instruments. He writes about how kids learn to build, think, and create in a tech-saturated world. Read more at hiwavemakers.com.

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Sources

1. Semiconductor Industry Association. State of the U.S. Semiconductor Industry 2023. https://www.semiconductors.org/state-of-the-us-semiconductor-industry/
2. U.S. Congress. CHIPS and Science Act of 2022. https://www.congress.gov/bill/117th-congress/house-bill/4346
3. TSMC. Corporate Responsibility Report 2023. https://www.tsmc.com/english/csr/csr_report.htm
4. NVIDIA. H100 Tensor Core GPU Datasheet. https://www.nvidia.com/en-us/data-center/h100/
5. ASML. Annual Report 2023. https://www.asml.com/en/investors/annual-report
6. Flamm, K. “CHIPS Act, Subsidies, and Semiconductor Manufacturing Competitiveness.” Brookings Institution, 2023. https://www.brookings.edu
7. McKinsey Global Institute. Semiconductor Talent: Meeting the Demand. (2022) https://www.mckinsey.com